P96 3.3.1 and GBAPII++

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Don't Panic. Please wash hands.
  • I'd love to claim that, but it must go out to the Amiga crowd in general. Even with loud and unpleasant exceptions, the majority is creative, helpful and kind.

  • New board, new challenges:


    Is there a way to tell P96 to set the memory clock for the onboard-DRAM?


    I would also be fine being able to hex-patch the value that goes into the SR1 F: MCLK Select Register of the GD5434.

  • The mem clock register is NOT accessible from the tooltypes. To our knowledge, the driver can generate all output modes that the chip is supposed to support, so I'm wondering what you attempt to accomplish here: Higher screen refresh rate? Cranking up the frequency beyond the currently-set 50MHz will highly depend on the memory chips that are installed.


    I smell pixel flickering and trashed screen parts during blitter operations, especially because there are multiple production runs with different memory chips in the field. What works on one card will likely fail on a different one with different memory chips.


    The GBAPII+ driver isn't even part of the P96, so even if we're making the register available in the GD5434 chip driver, the card driver needs to be made aware of the new interface, as the chip driver of course does not have access to the tooltypes of the card driver. Not sure if it's worth digging this deep for something that will likely break compatibility with other cards in the field.

  • The mem clock register is NOT accessible from the tooltypes. To our knowledge, the driver can generate all output modes that the chip is supposed to support, so I'm wondering what you attempt to accomplish here: Higher screen refresh rate? Cranking up the frequency beyond the currently-set 50MHz will highly depend on the memory chips that are installed.


    I smell pixel flickering and trashed screen parts during blitter operations, especially because there are multiple production runs with different memory chips in the field. What works on one card will likely fail on a different one with different memory chips.


    The GBAPII+ driver isn't even part of the P96, so even if we're making the register available in the GD5434 chip driver, the card driver needs to be made aware of the new interface, as the chip driver of course does not have access to the tooltypes of the card driver. Not sure if it's worth digging this deep for something that will likely break compatibility with other cards in the field.

    Thanks for clarifying this. The goal here was to make 35ns memory chips work with the graphic chip. So this is not about higher refresh rates. I was hoping that w.r.t. different boards (with different memory chips) using the same graphic chip driver, the memory clock could already be easily accessible.


    I wanted to modify MCLK because I had a board equipped with 35ns memory chips that has some funny issues (display corruption in operations involving display memory reads). I was suspecting that the MCLK is programmed for 60ns memory leading to timing problems because actually memory accesses can be too slow. According to the memory and graphics chips datasheets, the actual memory chip cycle requirements for the 35ns chips are way off from what the GD is probably programmed to.


    However, since there is no easy way to try this from the driver side, replacing the memory chips makes most sense. So my case is no longer valid.

  • You could try writing to the register directly, after the driver is initialized.


    Please understand that for such one-off experimental things, we can't justify driver development. Neither the card, nor the driver are iComp products. The driver is not in the P96 package (we don't have the rights or sources), and we don't make the card.

  • Just wanted to point out that the GBA-PII++ cards are now officially supported in P96 3.4.1.


    I installed it recently and it works great. The card is now seen properly in the P96Prefs program.