It has been a while - i have just uploaded another core update for you to play with Most notable are the REU fixes and the VGA rewrite. This should solve most - if not all - problems people reported with various monitors.
The changes in detail:
Code
- FPGA Core:
- ----------
- - on reset initialize CPU port DATA to 0.
- - tweak ANE magic constant, fixes Spectipede and Turrican 3
- - fixed "Nordic Power" mode in Retro/Nordic Replay emulation
- - support "clockport enable" bit in Retro/Nordic Replay emulation
- - added optional "B for up" for CDTV remote
- - New SID emulation that uses lookup tables for the waveforms, resulting in more
- accurate emulation of combined waveforms.
- - Fix to get proper values for CIA alarm registers on reset
- - Fixed off by one error in the envelope rate generator tables.
- - Fix for envelope emulation when starting release while in the attack phase.
- - A fix for dmadelay by introducing a delay on the colcounter and starting it
- one cycle early.
- Assumption is that in the real vic-chip the 10 bit screen address counter is a
- ripple counter with extra latch on the output.
- - New REU implemenation with prefetching logic to work around Chameleon SDRAM
- latency.
- This removes an unnecssary dummy cycle and makes the REU emulation cycle
- exact.
- - Fix REU memory access glitch by giving it one more delay cycle in the system
- ram multiplexer. (a hidden bug now visible with previous fix)
- - Fixed issue with REU trigger through FF00 while turbo is active.
- - Fixed REU register default values after reset.
- - Added support for Amiga keyboard connected to the docking-station
- - Implemented reconfigurable PLL for the VGA clock. This allows the vga output
- to better match the standard vesa resolutions.
- - Added vga border option in register D0F2 to assist autoadjust on modern
- displays (is active in bootloader and in menu during VGA mode test).
- - New VESA video modes added and existing modes adjusted to better match
- standard modes. Any non-standard 72 Hz modes have been removed.
- - Added logic to select the proper sync. polarity for each VGA mode. Fixed
- wrong sync. polarity on V2 hardware.
- - Adjust pipeline length of hsync, vsync, ena_rgb to eliminate glitches on the
- left side of the screen (was only visible on 1280x1024 resolution)
- Menu System:
- ------------
- - BUGFIX: leave clockport setup alone on "Reset to Basic".
- - BUGFIX: the filecopy feature of the file browser produced broken files due
- to a compiler bug, which has been fixed.
- - the easyflash EAPI sets the EF registers to the same values as the original
- flash driver at exit of various functions. this increases compatibility
- with some (technically buggy) programs that rely on these values.
- - sysinfo also shows the current slot as letter
- - During the boot loader and the VGA mode test a tiny white border will be
- shown around the VGA display area, which will make it easier to adjust and
- will make "auto adjust" work better.
As usual get the update on the Chameleon wiki page.
Have fun!