Minimig on v2

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  • Tobias : Alastair Robinson who ported the MiniMig core to the V1 is on our Fb group and he says he has downloaded Quartus and the example V2 code and I am sure he is willing to give it a try, but it would be great if you got in touch with him.

  • Well, all of Russia is waiting for the transfer of mining))
    When will the download link please warn. I'm still doing an advertising campaign and posting on my channel what Chameleon can do.

    Many are waiting for the Amiga, although I bought it myself to listen to StereoSid

  • AGA does require more FPGA space, and I'm not sure if that fits the Chameleon. So for the moment, I don't want to promise more than what we have for the V1 hardware, and that's ECS with a turbo-CPU option and a lot of memory.

  • If Alastair first brings the ECS Minimig core to the V2, maybe he'd like to see if the MistAGA core

    Second that ! AGA core possible too I wonder ?

    I downloaded the mister amiga minimig-aga core and I think it was 3 times the filesize of the ecs-minimig core. So as Jens says, It might not fit. I would much rather have RTG than AGA, actually :)

  • AGA has more bandwith, so it can acces memory faster. This can be a good benefit for games and on WorkBench applications.


    Indeed, RTG runs smoother, even on 24bit color (if I compare AGA vs CVS64/3D on my a4000t/060). But i suspect there is even more FPGA space needed to implement this.

  • AGA has more bandwith, so it can acces memory faster. This can be a good benefit for games and on WorkBench applications.

    The ECS Minimig core already has Turbo ChipRAM so you get some of those benefits already. (Zeewolf 2 runs really nicely, for example.)


    I'm not making any promises regarding the AGA core because it involves porting not just the chipset design, but also the firmware in the MIST's onboard microcontroller - which the Chameleon has to replicate within the FPGA as a second CPU (which is why it might not fit). For the forseeable future I'll only be tackling the low-hanging fruit - porting the existing ChameleonV1 cores.

  • The ECS Minimig core already has Turbo ChipRAM so you get some of those benefits already. (Zeewolf 2 runs really nicely, for example.)


    I'm not making any promises regarding the AGA core because it involves porting not just the chipset design, but also the firmware in the MIST's onboard microcontroller - which the Chameleon has to replicate within the FPGA as a second CPU (which is why it might not fit). For the forseeable future I'll only be tackling the low-hanging fruit - porting the existing ChameleonV1 cores.

    If you could bring the minimig-core out for V2 first, I think you'll be treated as a saint for a long time ;-) And while that gold and glory rains over you for the year to come, you are free to see if RTG or AGA is possible to add ;-)

  • The ECS Minimig core already has Turbo ChipRAM so you get some of those benefits already. (Zeewolf 2 runs really nicely, for example.)


    I'm not making any promises regarding the AGA core because it involves porting not just the chipset design, but also the firmware in the MIST's onboard microcontroller - which the Chameleon has to replicate within the FPGA as a second CPU (which is why it might not fit). For the forseeable future I'll only be tackling the low-hanging fruit - porting the existing ChameleonV1 cores.

    Mr. Robinson, how far have you gotten on the ECS-Core task. I am asking so I can inform the group over at FB :-) Everybody is standing in circle around you chanting and ready to throw $-bills at you ;-)

  • Patience guys, it will all take time. The minimig core is the least fun core to port because of how it was written - so it might not happen real soon.

    You know us. Eager to test :-)

    Are you aiming for a quick port just to get the V1 core running "as is" on the V2 or are you doing further changes ?