P96 V3.1.0 herausgegeben

Changes in 3.1.0:

• This version adds much better multi-monitor support, including keeping the native Amiga display on the native RGB output if the screen is switched away from it.
• Mode coercion was actually slightly broken and could result in the mouse pointer leaving a native screen topwards even though an underlying RTG mode could not be shown.
• HIRES mouse pointers are now again available on Os 3.2 due to a new interface between RTG graphics and the intuition pointer class.
• If a board signals that it is not part of the display chain, P96 keeps now the native display active on the Amiga RGB output and thus allows a two-monitor setup with the native and the RTG output.
• The Pixel64 driver failed to detect the graphics card on the ateo bus board. The card detection function was fixed. Note that the older ateo driver you find elsewhere does not reserve sufficient memory for the sprite data and thus trashes the mouse pointer.
• See also the release notes of the 2.2 release: The fastlayers.library is obsolete. If you want fast layers operations, make sure you install either Os 3.1.4, or the V45 layers library from aminet.
• The screen-dragging disable logic did not work entirely correctly and enabled screen dragging, even if front and back screen were on two different boards.
• The maximal bitmap width on the S3Virge and S3Trio chips allowed to exceed widths of 4096 bytes, beyond what the chip can handle.
• Due to a FIFO misconfiguration, the S3Virge could not use the blitter if the stream processor was disabled and showed display glitches at high display resolutions. This was fixed.
• The rtg.library could cause a hit if a ViewPort with a NULL RasInfo or ColorMap was passed into LoadView.
• The rtg.library erraneously activated PiP/memory windows even if those were on a back screen.
• The memory window of the CVision3D was broken in multiple ways. Unfortunately, the stream processor requires a wait for a vblank to get disabled savely, or it trashes the screen or hangs. Note that the processor needs to be disabled on screen dragging or screen switches, so this happens regularly.
• Re-enabled the CVision3D memory window on 256 color background. There is nothing wrong with that.
• The WaitVerticalSync() function of the S3 chip did not restore memory banking properly on exit if waiting for the end of the sync. Note that the interrupt was disabled on Z-II sytems anyhow that required memory banking.
• The S3 Virge interrupt handler was massively reworked to operate properly on Z-II and Z-III machines. In particular, it restores proper banking from a shadow register.
• Now in Zorro-II mode the CVision3D also allows board interrupts. Enabled interrupts allow a more fluently screen dragging, and also may be used to synchronize to the screen, avoiding flicker on animations.
• Waiting for vertical blanking on the S3Chip was not working at all on Z-II machines as it accessed the register in the I/O bank where, due to a chip erratum, it was never registered. The Z-II code now accesses the register in the MMIO bank where it works.
• In case a screen whose monitor is not in the display chain looses the intuition input focus, P96 removes now the mouse pointer from the screen.
• In case a smaller screen was dragged down with a larger screen in the back, the rtg.library may have trashed memory upfront the smaller screen. This was because the lib assumed erraneously that the frontmost screen could be panned left-right.
• The default maximal planar memory is now 128K instead of 256K as this is the maximum permissible by legacy VGA registers (GR6, to be precise).
• In case allocating a planar bitmap was attempted that was too big to fit on the card, the rtg.library would have let this allocation pass, even though any later attempt to display this bitmap would have failed. The updated code now checks beforehand whether a bitmap can possibly be displayed.
• The memory reorginzation function did not reliably move planar data around as the BlitRectNoMaskComplete() function for planar data is just a dummy. Planar data is now moved by the CPU manually through the legacy VGA memory apperture mapping.
• 4-bit planar modes are now available on the CVision3D/S3Virge based cards. Due to a chip limitation, the maximum available memory in the planar mode is limited to 128K per plane, i.e. 512K total.
• The S3Virge memory window is now also disabled for interlaced modes because the S3 stream processor does not work on interlaced screens. Note that the stream processor is also not available on double clocked (high-resolution) modes and double-scan (line-doubled) modes.
• The CVision3D card driver recognizes now the tooltype INTERRUPT=No to disable the vertical sync interrupt usage. Use INTERRUPT=No in case you find that the interrupt handler is not working for you and you observe problems or conflicts with other expansion cards or the CIA interrupts.
• The rtg.library avoids now an additional WaitForSync() if it is possible. This enables smooth screen dragging especially on those chips where the CPU cannot reliably wait for a vertical blank (S3Virge).
• Due to panning by adjusting the memory window address and a rounding issue, the S3Virge memory window overlay could stop display DMA for the primary (background) stream a bit too early, causing artefacts at the left edge of a window on a panned screen.
• The S3Virge hardware accelerated line drawer did not clip lines correctly and could therefore draw outside of the window bounding box.
• For consistency reasons, the CVisionPPC card now also recognizes the tooltypes INTERRUPT=No and INTERRUPT=Yes, they work the inverse of the NOINTERRUPT tooltype, which is just harder to understand (double negation).
• The S3 accelerated line drawer was off by a lot. Due to a some missing sign extensions and clearing of low-order bits, computations might have been just wrong, resulting in incorrect clipping results. In case coordinates where negative, the algorithm also incorrectly adjusted the line start address without ensuring that this address must be a multiple of 8.
• The S3 line drawer did not always clip correctly, resulting small out-of-bounds pixel errors. The computation of the clip window is now done hopefully correctly.
• Since the S3 line drawer cannot ensure that it draws lines exactly as the built-in Bresenham which is used for off-card line drawing, and since this may result in some wrong pixels, the accelerated line drawer of the CVision3D can now be turned off by the tool type FASTDRAWLINE=No.
• The CVisionPPC accelerated line drawer may have also caused small out-of bounds clipping errors because its line drawer may not operate exactly as the built-in Bresenham algorithm. The same fixes of the clip window computation have been here applied as well. Also, the CVisionPPC fast line drawer can now be turned off by the tool type FASTDRAWLINE=No if this turns out to be a problem.
• The rtg.library line drawer interface was streamlined a bit avoiding unnecessary register ping-pong, probably speeding up the line drawer by a small amount.
• The 24-bit BGR mode of the S3Virge/CVision3D is back. Note, however, that it does not support screen dragging due to a limitation of the S3 chip. Note that this mode, due to the same limitations, does not support interlace, double-scan or double-clock modes. The resulting display will look "funny" because the stream processor (on which this mode is based) does not support scan doubling, interlace, double-clocking and screen-dragging.
• Due to some trickery, the planar mode of the S3Virge also gets a hardware sprite. The HW sprite is also enabled on the 24 bit mode.
• The S3Virge driver forgot to adjust the endianness for the line drawer and therefore drew lines in the PC endian monitor modes in the wrong color.
• Due to a hardware bug of the S3Virge, the line drawer operates flakey in the 24bit mode and may draw the last pixel in the wrong color. It is now replaced in this specific mode by the software renderer.
• The blitter fallback for the 32-bit true-color modes on the S3Virge were activated way too early as the chip can take stride values up to 4095 bytes, sufficient for most true-color screens. This allows blitter usage for rectangle fills, scrolling and inversion for many cases and thus speeds up processing of these modes by quite a bit.
• In 24 bit RGB or BGR modes, DrawEllipse confused the R/B channel order and drew the ellipses in the wrong color. All other modes are fine.
• Ellipse drawing on non-layered rastports in the COMPLEMENT mode left a couple of pixels non-complemented, namely the top, bottom, left and right edge of the ellipse, and for circles, the 45 diagonals. Actually, these pixels were inverted twice. Also, COMPLEMENT drawing of ellipses used the wrong color for 15, 16 and 32 bit RGB modes.
• The CVision3D driver reconfigures now Gary for a more relaxed bus timeout as the S3Virge chip may lock the bus for quite a while in high color depth modes and may thus trigger a physical bus error.
• In case you see flicker on 24bit 1024x768 modes of S3Virge boards, ensure that you reduce the clock frequency a bit as the chip is operating at its edge of bandwidth. Possible bus contentions may also cause system freezes or bus errors.