Turbo Chameleon 2 strange menu issue

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Don't Panic. Please wash hands.
  • Hi all,


    Can anyone tell me what's causing this? This occurs on 2 difference C64 machines, but the TC otherwise works fine. It is symptomatic of faulty colour RAM, but in both the machines it occurs on, colour RAM is fine (C64 diag 586220+ passes) and the machine itself exhibits no problems. It's just the TC menu system that does this. I've attached a little video of it too, as the colours are changing rapidly.


    EDIT: to add, i'm running the latest firmware (beta 9n).


    Thanks!


    tc-menu.7z

  • It may still be a faulty colour RAM that has slowed down due to ageing over the years. Further, I'd like to know what type of PLA is in that board, and of course what board revision it is exactly (assy. no.). Some people still believe that using an Eprom-based PLA is a good idea, although debunked about two decades ago - the video certainly looks like during VIC cycles, the upper 4 bits don't arrive at the VIC chip.


    Another possibility may be a repair that has been executed on your board some time in the past. Maybe a generic TTL chip was only available in non-LS variant at the time and in the area where your board was repaired? Just a wild speculation. In any case, there's not too many influencing factors, and if you're willing to go down the rabbit hole a little further, you'll figure it out.

  • Seeing the board would be interesting indeed - this very much looks like broken colour RAM.


    Another interesting thing would be... enable turbo mode and configure the left button to toggle turbo. Go to BASIC and then press the button to switch turbo on and off - does that also enable/disable those random colors?

  • Thanks for the hints. The board is a 250425 with a GAL PLA, custom kernal switcher and ARMSID. I'll test a few different PLAs (I also have some neatPLAs and original PLAs), an original SID and an original kernal and see which of those (if any) resolve the problem. Will also look carefully at the logic. I have a mix of logic ICs here, some original, otherwise brands like TI and NEC.


    Thanks!

  • I can't really make out who the author of that PAL replacement contraption is: Dutch comments in the source code and the person hosting the page is French.


    Anyway, spreading the equations over two GALs means that there are some things that need one more pass through the logic, causing delays here and there. On the logic side, that's OK, and the unit will most certainly have identical behaviour on the test vector front. However, a thorough timing analysis would be necessary to verify that kind of design. Not sure if that's worth the time, as SuperPLA is available, known-good, affordable and comes with a warranty.


    If there is anyone who has done a timing- or logic analysis of that two-GAL-design, I'm happy to look at the results to see what level of testing that went through. Without such a verification, I have to recommend to go with a known-good part.

  • The last reply was more than 365 days ago, this thread is most likely obsolete. It is recommended to create a new thread instead.