Indivision ECS (V1) firmware update 1.15

I have two Indivision ECS V1s. Same thing happens with me when I flash vv1.15. I assume v1.15 is a slightly modified v1.10 and that's why they didn't change the version number on the startup screen. I think they added some power saving feature in v1.15 VS 1.10. So very minor change.

Quote from Geux

In the flashing utility it shows v1.15 as the current version after the power cycle, but on the ECS bootscreen it shows v1.10

That's not what it was, v1.01, but also not what it should be, v1.15?

That's correct - V1.15 is only a re-compile of the V1.10 logic with different (more optimized) power settings. I just didn't go through the whole version update procedure, as that was developed by Oliver, who does not work for iComp any more.

So nothing to do on your side, other than ignoring the displayed version number

Quote from turrican9

I think they added some power saving feature in v1.15 VS 1.10. So very minor change.

There is no "power saving feature" - it's the output drive power settings that were reduced to the required minimum "per signal" for all cores, so nothing that can be seen or controlled from the Amiga-side. I've done that to reduce signal noise and improve metastbility. For some of the known-bad power supplies, it actually makes the PLL mod unnecessary.

Quote from Jens

There is no "power saving feature" - it's the output drive power settings that were reduced to the required minimum "per signal" for all cores, so nothing that can be seen or controlled from the Amiga-side. I've done that to reduce signal noise and improve metastbility. For some of the known-bad power supplies, it actually makes the PLL mod unnecessary.

I see. I was probably thinking about the download description for the update and remembered something about lower power setting:

• Indivision ECS Update file V1.15 (june 3rd, 2012) - pure update file, please flash with flash tool. This includes changes of V1.10, but uses lower power settings for the FPGA, which may improve performance with flaky power supplies.

No mention of a "power saving feature" in that bit of text

I understand that the concept of "change the hardware behaviour on such a low level with a flashable file" is hard to grasp. It's like dialing down the volume on roughly 60 signals, yet not touching a single button. FPGAs are great - if wired up correctly for upgrades in the field, that is.